Advanced Micro Devices, Inc. Cache RTL MTS Design Engineer - 89743 in Fort Collins, Colorado
What you do at AMD changes everythingAt AMD, we push the boundaries of what is possible. We believe in changingthe world for the better by driving innovation in high-performancecomputing, graphics, and visualization technologies - building blocks forgaming, immersive platforms, and the data center.Developing great technology takes more than talent: it takes amazing peoplewho understand collaboration, respect, and who will go the "extramile" to achieve unthinkable results. It takes people who have the passionand desire to disrupt the status quo, push boundaries, deliverinnovation, and change the world. If you have this type of passion, weinvite you to take a look at the opportunities available to come join ourteam.THE ROLE:This engineer will utilize their technical expertise to assist in the designof AMD's next-generation CPU microprocessors.They will maintain and enhance existing RTL designs related to CPU cachefeatures. Work on related projects and/or assignments as needed, to meetteam goals. Write detailed specifications for the RTL designs, developquality, timely and cost-effective solutions independently. Write andmaintain design to meet timing, area and power goals set for the project. Beinvolved in all phases of the project from specification to working withsilicon validation teams.THE PERSON:A successful person in this role would possess good written and communicationskills and would be able to work in a collaborative team environment workingarchitects, verification, physical-design and silicon validation teams. Atthis level, they would need to demonstrate leadership qualities and haveexcellent time management skills.KEY RESPONSIBILITIES:Collaborate with a dedicated team of engineers to define and implement cachemicroarchitecture for AMD CPUs.Reliably deliver a design from concept through tape-out by innovating throughcomplex and challenging requirements.Identify customer challenges and insert a compelling AMD value proposition toaddress challenges.Write and maintain detailed specifications for the design.Work with cache verification team members to enable them to stimulate andcheck the design.Write and maintain external specifications for product, test teams andexternal customers to use.Design and develop logic used in CPU caches using hardware descriptionlanguage.Qualify the logic changes in RTL by simulating the design using test cases ona simulator.Work closely with the Physical Design team members to drive design closureusing experience with Static Timing, CDC/Gate CDC, and Static Poweranalysis tools and flows.Work closely with the Physical Design team members to trade-offPower-Performance-Area (PPA) goals for the design.Make technical contributions and innovations that enable high performance,high frequency, and power efficiency on the Caches of our server,desktop, and laptop CPUs.Debug logic, electrical and firmware issues found in silicon debug utilizingsilicon debug tools and techniques. Work with silicon validation teams duringbring up phase of the product. Write and maintain scripts that display thestate of the design to be used in silicon debug and validation.PREFERRED EXPERIENCE:Strong logic design skills using Verilog HDL.Good understanding on different phases of logic design from specification tosilicon validation.Proficiency in Verilog HDL.Proficiency with programming and scripting languages.Understanding of modern CPU architecture - prior experience designing sharedcache, last level cache and related IPs, out-of-order execution units orFloating-Point data-paths and control a plus.Eagerness to learn and grow as a CPU Cache design engineer.Collaborate effectively towards the success of the project by working closelywith logic design, physical design and silicon validation teammates acrossthe wider organization.Demonstrate a responsive track record... For full info follow applicationlink.